OPENING SPEECH

Artificial Intelligence for User-Friendly Technology

Mehmet Izzi Celebiler is founder and chairman of TurkNet (https://turk.net), a telecommunication company offering fixed line telephone, xDSL and data transmission services in Turkey. He worked in the telecommunications industry in USA (COMSAT), the Netherlands (SHAPE Technical Center of NATO), Belgium (NATO Communications System Agency) and France (EUTELSAT) before returning to Turkey. He was awarded a MSc. degree by the Technical University of Istanbul and a Ph.D. by the University of Pennsylvania.

Abstract

Scientific discovery is continuously enabling the development of marvelous new devices based on new technology being offered to the public. In fact, new or improved devices are hitting the market so fast we sometimes feel drowned by them. It is hard to keep up with the many wonderful new possibilities available in photography, making, choosing and playing music, communicating, producing and reproducing things etc.



Our ability to benefit from this new technology is possible only when we can use it. This is not always easy.



I think that engineers who make the development of these wonderful devices or develop them do not always think of final operability for the uninitiated in their design of new products. The new services and devices created by new technology often require a great deal of expertise to use because the engineers who create them do so with their own technological understanding in mind.



I believe that it should be our task as engineers to develop devices and services which can be easily used by everybody.



One way to achieve this is by including intelligence in our creations. It would be wonderful if every device could check its own health and communicate its state to the person using it. It would be great if every device, when it detected a person doing something with it, could guide that person in its use.


PLENARY SPEECH 1

The Invisible Spreading of Image and Vision IC Technologies

Ángel Rodríguez-Vázquez (IEEE Fellow, 1999) received the bachelor’s (Universidad de Sevilla, 1976) and Ph.D. degrees in physics-electronics (Universidad de Sevilla, 1982) with several national and international awards, including the IEEE Rogelio Segovia Torres Award (1981). After different research stays in University of California-Berkeley and Texas A&M University he became a Full Professor of Electronics at the University of Sevilla in 1995. He co-founded Instituto de Microelectrónica de Sevilla, a joint undertaken of the Consejo Superior deInvestigaciones Científicas (CSIC) and the he University of Sevilla and started a Resaerch Lab on Analog and Mixed-Signal Circuits for Sensors and Communications. In 2001 he was the main promotor and co-founder of the start-up company AnaFocus Ltd and served as CEO, on leave from the University, until June 2009, when the company reached maturity as a worldwide provider of smart CMOS imagers and vision systems-on-chip.



His research is on the design of analog and mixed-signal front-ends for sensing and communication, including smart imagers, vision chips, implantable neural recorders/stimulators and biomedical circuits and with emphasis on system integration. He has authored 11 books, 36 additional book chapters, and some 500 articles in peer-review specialized publications. He has presented invited plenary lectures at different international conferences. His research work has received some 8,500 citations; he has an h-index of 48 and an i10-index of 166. Dr. Rodríguez-Vázquez has received a number of awards for his research (the IEEE Guillemin-Cauer Best Paper Award, two Wiley’s IJCTA Best Paper Awards, two IEEE ECCTD Best Paper Awards, one IEEE-ISCAS Best Paper Award, one SPIE-IST Electronic Imaging Best Paper Award, the IEEE ISCAS Best Demo-Paper Award, and the IEEE ICECS Best Demo-Paper Award).



Prof. Rodríguez-Vázquez has always been looking for the balance between long-term research and innovative industrial developments. He was the main promotor and co-founder of AnaFocus Ltd. and he participated in the foundation of the Hungarian start-up company AnaLogic Ltd. He has eight patents filed, some of which are licensed to companies. AnaFocus was founded on the basis of his patents on vision chip architectures.



He has served as Editor, Associate Editor, and Guest Editor for IEEE and non-IEEE journals, is on the committee of several international journals and conferences, and has chaired several international IEEE and SPIE conferences. He served as VP Region 8 of the IEEE Circuits 1087 and Systems Society (2009-2012) and as Chair of the IEEE CASS Fellow Evaluation Committee (2010, 2012, 2013, 2014, and 2015).

Abstract

Advances on CIS technologies, heterogeneous packaging and system embedding enable to reduce Size, Weight and Power (SWaP) of vision systems. Vision can hence be incorporated to applications calling for minimum SWaP, such as vision-enabled wireless sensor networks, unattended surveillance networks, low payload vehicles, personal portable vision equipment, visual prosthesis, internet-of-the-things, etc. These applications are forecast to gain relevance in the coming years as compared to the dominant CIS niche of smart phones, tablets and other consumer domains.



These new applications domains have technical challenges different from those of consumer ones. Thus, while consumer applications call for images that can be reproduced with all their fine details for their interpretation by humans, many of these new applications call for extracting the information contained into the images for their interpretation by machines. Subtle details of the images are irrelevant in many cases and may hence be discarded for storage and processing. In summary, the domain of electronic imaging and CIS technologies is witnessing a move from “displaying”, for interpretation by humans, to “analysing”, for interpretation by computers.



Confronting the scientific challenges of such a move requires using computer vision concepts for the design of new generations of smart image sensor front-ends. The endeavour is challenging because imager architects and computer vision architects have traditionally non-overlapping groups talking quite different languages. However, synergies among these two disciplines are needed to conceive new sensor front-ends that are capable to achieve minimum power and maximum efficiency by discarding irrelevant data right at the sensory front-end and precluding them to propagate into the system calling for storage and processing resources.



Data reduction through pre-processing is smartly implemented in natural vision systems [1], [2]. Also, this approach has been extensively addressed in academia during the last years and vision systems using such architectural concept are recently making the transition from academic proof-of-concept prototypes to industrial products [3].



Starting with the identification of relevant computer vision primitives for data reduction across the vision processing chain, this presentation discusses different smart-image sensor architectures for feature extraction. Besides explaining basic architectural concepts and circuits needed to implement them, the presentation shows results from several proof-of-concept chips, from camera modules built with these sensors and from portable vision application demos using these camera modules.



[1] B. Roska and F. Werblin, ”Vertical Interactions Across Ten Parallel, Stacked Representations in the Mammalian Retina,” Nature, 410, pp. 583-587, 2001.
[2] T. Gollisch and M. Meister, ”Eye Smarter than Scientists Believed: Neural Computations in Circuits of the Retina”, Neuron Review, vol. 65, pp. 150-164, January 2010.
[3] C.L. Lee and C.C. Hsieh, ”A 0.8-V 4096-Pixel CMOS Sense-and-Stimulus Imager for Retinal Prosthesis,” IEEE Transactions on Electron Devices, vol. 60, no. 3, 1162-1168, 2013.
[4] J. Fernádez-Berni et al., ”FLIP-Q: A QCIF Resolution Focal-Plane Array for Low-Power Image Processing,” IEEE Journal of Solid-State Circuits, vol. 46, no. 3, pp. 669-680, March 2011.
[5] S.J. Carey et al., ”A 100,000 fps Vision Sensor with Embedded 535GOPS/W 256 x 256 SIMD Processor Array,” 2013 Symposium on VLSI Circuits (VLSIC), pp. C182-C183, 2013.
[6] S. Park et al., ”243.3 pJ/Pixel Bio-Inspired Time-Stamp-Based 2D Optic Flow Sensor for Artificial Compound Eyes,” 2014 IEEE Int. Solid-State Circuits Conf. Digest of Tech. Papers (ISSCC), pp. 126-127, 2014.
[7] A. Rodríguez-Vázquez et al., ”ACE16k: The Third Generation of Mixed-Signal SIMD-CNN ACE Chips Toward VSoCs”, IEEE Transactions on Circuits and Systems-I, vol. 51, no. 5, pp. 851-863, May 2004.
[8] Anafocus Ltd. [Online]. Available. http://www.anafocus.com.

PLENARY SPEECH 2

Bistability and Oscillations in Gene Regulatory Networks

Cüneyt Güzeliş received the B.Sc., M.Sc., and Ph.D. degrees in electrical engineering from Istanbul Technical University, İstanbul, in 1981, 1984, and 1988, respectively. He was with İstanbul Technical University from 1982 to 2000 where he became a full professor. He worked between 1989 and 1991 in the Department of Electrical Engineering and Computer Sciences, University of California, Berkeley, California, as a visiting researcher and lecturer. He was with the Department of Electrical and Electronics Engineering and also served as the Dean of the Engineering Faculty from 2000 to 2011 and from 2003-2009, respectively, at Dokuz Eylül University, İzmir, Turkey. He work at the Department of Electrical and Electronics Engineering from 2011 to 2015 and served as the Director of the Graduate School of Natural and Applied Sciences from 2013-2015 in İzmir University of Economics. He is currently working in Yaşar University, Faculty of Engineering, Department of Electrical and Electronics Engineering. His research interests include artificial neural networks, biomedical signal and image processing, nonlinear circuits-systems, and control, and educational systems.

Abstract

Gene Regulatory Network (GRN), which is made up of interacting regulators such as DNA, RNA, proteins and their complexes, controls the expression levels of mRNA and proteins. GRNs govern several cellular processes such as metabolism, signalling, cell-differentiation, cell-division, cell-cycle arrest in response to DNA damage, and apoptosis. Understanding the dynamics of GRNs by introducing accurate models and then applying efficient mathematical/computational methods for their analysis is useful in identifying the underlying mechanisms of normal and abnormal cell functioning and hence developing drugs against diseases including cancer. Bistability and oscillations are two crucial nonlinear dynamical behaviours observed in a diverse area of biological systems, in particular, gene regulatory networks. As in many others including electrical systems, bistability and oscillation phenomena appear as consequences of specific patterns of interactions such as positive/negative feedback loops among the components of GRN and they have a certain function on the control of gene expression to regulate the cellular processes and adaptation to the changing environment. The bistability in GRN is a biological switching mechanism accompanied with hysteresis. It appears in a wide variety of GRNs including the lac operon of Escherichia coli, which is responsible for controlling the lactose metabolism under glucose starvation. The bistable genetic switches with their hysteresis characteristics behave, like a thermostat, as ON/OFF controllers avoiding unnecessary transitions between induced and uninduced states of the associated operon. On the other hand, the oscillations in GRN, such as circadian rhythm and 2-phase dynamics of tumour suppressor p53 network, are of essentially relaxation type providing constant amplitude and period, and possess self-sustaining property and the ability of synchronization to the environmental inputs and to the interlinked networks. The behaviour of GRNs is generally modelled by using the state equations with rational right hand sides derived from enzyme kinetics based on Michaelis-Menten and/or Hill approaches. The talk will present a series of studies on bifurcation and local stability analysis of some primary examples of bistable switches and relaxation oscillators appearing in GRNs.


PLENARY SPEECH 3

Large Area Conformable Electronic Skin

Ravinder Dahiya is Professor of Electronics and Nanoengineering and Engineering and Physical Sciences Research Council (EPSRC) Fellow in the School of Engineering at University of Glasgow. He is the Director of Electronic Systems Design Centre (ESDC) and the leader of Bendable Electronics and Sensing Technologies (BEST) group. His group conducts fundamental research on high-mobility materials based flexible electronics and electronic skin, and their application in robotics, prosthetics and wearable systems.



Prof. Dahiya has published more than 180 research articles, 4 books (3 at various publication stages), and 9 patents (including 7 submitted). He has given more than 90 invited/plenary talks. He has led many international projects including those funded by European Commission, EPSRC, The Royal Society, The Royal Academy of Engineering, and The Scottish Funding Council.



He is Distinguished Lecturer of IEEE Sensors Council and is on the Editorial Boards of Scientific Reports (Nature Group), IEEE Transactions on Robotics and IEEE Sensors Journal. He is the Technical Program Co-Chair (TPC) for IEEE Sensors Conferences in 2017 and 2018.



Prof. Dahiya holds EPSRC Fellowship and in past he received Marie Curie Fellowship and Japanese Monbusho Fellowship. He has received several awards and most recent among them are: 2016 IEEE Sensor Council Technical Achievement Award, the 2016 Microelectronic Engineering Young Investigator Award, and International Association of Advanced Materials (IAAMM) Medal for the year 2016. In 2016, he was included in list of Scottish 40UNDER40.



Personal website


URL


Twitter: @RavinderSDahiya


TEDx talk: ‘Animating the Inanimate World’

Abstract

The miniaturization led advances in microelectronics over 50 years have revolutionized our lives through fast computing and communication. Recent advances in the field are propelled by applications such as robotics, wearable systems, and healthcare etc. through More than Moore technologies. Often these applications require electronics to conform to 3D surfaces and this calls for new methods to realize devices and circuits on unconventional substrates such as plastics and paper. This lecture will present various approaches (over different time and dimension scales) for obtaining distributed electronics on flexible and conformable substrates, especially in context with tactile or electronic skin (e-skin). These approaches range from distributed off-the-shelf electronics, integrated on flexible printed circuit boards to advanced alternatives such as e-skin by printed nanowires, graphene and ultra-thin chips, etc. The technology for such sensitive flexible (and possibly stretchable) electronic systems is also the key enabler for numerous emerging fields such as internet of things, smart cities and mobile health etc. This lecture will also discuss how the flexible electronics research may unfold in the future.


PLENARY SPEECH 4

Quantitative, Architectural, and Circuit Optimizations for Reinforcement Learning

Sam Green received his bachelor's degree in Computer Science (2006) and master's degree in Applied Mathematics (2009) from the University of Central Arkansas. He is currently a Computer Science PhD student, working with Professor Çetin Kaya Koç, at the University of California, Santa Barbara. His research interests include optimized architectures for reinforcement learning policy evaluation, random number generation and testing, and cyber-physical security. From 2010 to 2015, he was a Senior Member of Technical Staff at Sandia National Laboratories, working as a cryptographic engineer.



Çetin Kaya Koç received the PhD degree in electrical & computer engineering from the University of California Santa Barbara in 1988. His research interests are electronic voting, cyber-physical security, cryptographic hardware and embedded systems, elliptic curve cryptography and finite fields, deterministic, hybrid and true random number generators. Koç is the cofounder of the Workshop on Cryptographic Hardware and Embedded Systems, and the founding editor-in-chief of the Journal of Cryptographic Engineering. He has also been in the editorial boards of IEEE Transactions on Computers (2003-2008, now) and IEEE Transactions on Mobile Computing (2003-2007). Furthermore, he was a guest coeditor of April 2003 & November 2008 issues of the IEEE Transactions on Computers. He is the co-author of the three books Cryptographic Algorithms on Reconfigurable Hardware, Cryptographic Engineering, and Open Problems in Mathematics and Computational Science, published by Springer. In 2007, he was elected as an IEEE fellow for his contributions to cryptographic engineering. Koç has professorial positions at UC Santa Barbara (USA), Istinye University (Turkey), and Nanjing University of Aeronautics and Astronautics (China).

Abstract

The field of machine intelligence is experiencing a resurgence, owing to a confluence of factors: Moore's Law has provided exponential returns for decades; the internet and low-cost sensors provide terabytes of data each day; classic algorithms have been used or modified to exploit this compute and data; and the open source community has aggressively built tools to allow a critical mass to use results and contribute to the field. Since 2011, deep neural networks (DNNs) have been the primary focus of machine learning and artificial intelligence researchers. Since 2015, the hardware community has iterated on classic architectures and both digital and analog circuit optimizations for neuromorphic design, refining them for modern DNN hardware acceleration. Additionally, quantitative optimizations have been applied to reduce both the necessary precision and the total number of multiply-accumulate operations required by DNNs. In 2015, DeepMind used DNNs as a high-capacity function approximator in their seminal Atari-dominating reinforcement learning (RL) work. Since then, we have seen a continuous stream of RL algorithm improvements and applications: AlphaGo Zero, self-driving cars, robotic control, and game AI. Owing to their applicability to real-time control problems, RL algorithms will have different constraints than general-purpose DNN classifiers. Just as DNN hardware accelerators have made a large impact in the past few years, we expect to see an influx of research and applications related to RL hardware accelerators. In this talk we synthesize the previous literature regarding DNN architecture optimizations and we describe new RL architectures.


INVITED SPEAKER

Future and Emerging Computing Paradigms in Electronics

Mustafa Altun received his B. Sc. and M. Sc. degrees in Electronics Engineering at Istanbul Technical University in 2004 and 2007 respectively. He received his Ph. D. degree in Electrical Engineering with a Ph. D. minor in Mathematics at the University of Minnesota in 2012. Since 2013, he is serving as an assistant professor of Electrical Engineering at Istanbul Technical University and is the head of Emerging Circuits and Computation (ECC) Group. Moreover, Dr. Altun has served as a principal investigator and researcher of various projects including EU H2020 RISE, National Science Foundation of USA (NSF), TUBITAK Career and TUBITAK University-Industry Collaboration projects. He is the author of more than 40 peer reviewed papers and a book chapter, and the recipient of the “TUBITAK Success, TUBITAK Career, and Werner von Siemens Excellence awards."

Abstract

This talk covers novel ways of computing, circuit design, and reliability techniques for electronic circuits and systems with a main target of future and emerging technologies. First, computing fundamentals for nano-crossbar arrays is discussed by introducing the related logic synthesis and fault tolerance techniques. Second, an accurate way of using stochastic logic is introduced with an aim of finding a cure for computing problems in large-area electronics. Finally, approximate computing techniques for neural networks and learning applications are presented.



Breaking news

Dear Delegates,
Conference Venue Hilton Batumi Hotel rooms now available at same discounted rate until 13th of November 2017, Monday 16:00 hrs. Turkish Time.
Therefore, please complete your Hotel reservations from registration web site before announced time.
Rooms will be booked only upon availability and at a different rate after this time.

Conference program is now available.

Click here to proceed to the program.

Registration is now open. NEWEST

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Important Dates NEWER

July 25, 2017
Special Session and Tutorials Proposals

August 1, 2017
Notification of Special Session Acceptance

September 5, 2017
Paper Submissions

October 15, 2017
Notification of Paper Acceptance

October 31, 2017
Camera-Ready Paper Submission

NEW

Extended versions of selected ICECS 2017 papers will be invited to submit to a special issue of TCAS 1.

Contact

For inquiries, please e-mail to icecs2017@isikun.edu.tr.